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ISL6740, ISL6741
Component List
REFERENCE
DESIGNATOR VALUE DESCRIPTION
C 1 1.0 μ F Capacitor, 1812, X7R, 100V, 20%
TDK C4532X7R2A105M
Adding Line Only Regulation - Feed Forward
Output voltage variation caused by changes in the supply voltage
may be virtually removed through a technique known as feed
forward compensation. Using feed forward, the duty cycle is
directly controlled based on changes in the input voltage only. No
closed loop feedback system is required. Voltage feed forward
C 2 , C 3
C 4 , C 6
3.3 μ F
1.0 μ F
Capacitor, 1812, X5R, 50V, 20%
TDK C4532X5R1H335M
Capacitor, 0805, X5R, 16V, 10%
TDK C2012X5R1C105K
may be implemented as shown in Figure 18.
R109 R110 R111
3.48k 698 806
VREF
C 5 , C 15 , C 16
C 7
0.1 μ F
Open
Capacitor, 0603, X7R, 50V, 10%
TDK C1608X7R1H104K
Capacitor, 0603, Open
+VIN
1.5V
R103
0.8V
R106
C 8
22 μ F
Capacitor, 1812, X5R, 16V, 20%
TDK C4532X5R1C226M
R100
69.8k
49.9k
U100A
+
100K
C 9 150 μ F Capacitor, Radial, Sanyo 16SH150M
C 10 , C 11 , C 12 , 1000pF Capacitor, 0603, X7R, 50V, 10%
C 13 , C 14 TDK C1608X7R1H102K
C 17 220pF Capacitor, 0603, COG, 16V, 5%
TDK C1608COG1C221J
C 18 0.047 μ F Capacitor, 0603, X7R, 16V, 10%
TDK C1608X7R1C473K
R101
2k
R102
100k
-
R104
100k
C100
1nF
R105
100k
R108
100k
U100B
+
-
R107
100k
to VERROR
C R1 , C R2
C R3
Diode, Schottky, BAT54S
Diode, Schottky, BAT54
D 1
Zener, 10V, Philips BZX84-C10
FIGURE 18. VOLTAGE FEED FORWARD CIRCUIT
L 1
L 2
L 3
Q 5
Q L , Q H
Q R1 , Q R2 , Q R3 ,
Q R4
R 1 , R 10
R 2
190nH
1.5 μ H
Short
3.3
3.01k
Pulse, P2004T
Pulse, PG0077.142
Jumper or Optional Discrete Leakage
Inductance
Transistor, ON MJD31C
FET, Fairchild FDS3672
FET, Fairchild FDS5670
Resistor, 2512, 5%
Resistor, 2512, 1%
The circuit provides feed forward compensation for a 2:1 input
voltage range. Resistors R 100 and R 101 set the input voltage
divider to generate a 1V signal at the input voltage that
corresponds to maximum duty cycle (V IN minimum). Resistors
R 109 , R 110 , and R 111 form a voltage divider from VREF to create
reference voltages for the amplifiers. The first stage uses U 100A ,
R 102 , R 103 , R 104 , and C 100 to form a unity gain inverting
amplifier. Its output varies inversely with input voltage and
ranges from 1V to 2V. The bandwidth of the circuit may be
controlled by varying the value of C 100 . The gain of the first
amplifier stage is:
R 3 , R 6
10.0
Resistor, 0603, 1%
V A = – V D + 3.00
V
(EQ. 25)
R 5
R 7
R 8 , R 9
R 11
R 12
R 13
R 14
R 15
R 17
R 18
R 19 , R T1
T 1
T 2
U 1
U 3
3.32
75.0k
20.0
100
8.06k
17.4k
Open
1.27k
97.6k
3.01k
10.0k
Resistor, 0603, 1%
Resistor, 0805, 1%
Resistor, 0805, 1%
Resistor, 0603, 1%
Resistor, 0603, 1%
Resistor, 0603, 1%
Resistor, 0603, Open
Resistor, 0603, 1%
Resistor, 0603, 1%
Resistor, 0603, 1%
Resistor, 0603, 1%
Midcom 31718
Pulse P8205T
Intersil HIP2101IB
ISL6740IB
21
where:
V A = Output voltage of U 100A
V D = The input divider voltage
The second stage uses U 100B , R 105 , R 106 , R 107 , and R 108 to
form a summing amplifier which offsets the first stage output by
0.8V (the value of C T valley voltage). The signal applied to the
V ERROR input now matches the offset and amplitude of the
oscillator sawtooth so that the duty cycle varies linearly from
100% to 50% of maximum with a 2:1 input voltage variation.
FN9111.6
December 2, 2011
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ISL6740IB-T
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